- Cost-effective and energy efficient 3-phase induction motor drive
- Interrupt driven
- Low memory and computing requirements
Resources; Code Size : 2 584 bytes ,RAM Size : 217 bytes, CPU Load : 33% @ 8MHz
The control circuit requires four PWMs with two complementary pairs with sufficient dead band between the complementary outputs. PWM0-PWM1 and PWM2-PWM3 are the PWM pairs with dead band. The PIC16F72 does not have PWMs designed in the hardware to output the way we need. Therefore, the PWMs should be generated in firmware and output to the port pins. Using PWMs, the DC bus is synthesized to give two sine voltages at 90 degrees out of phase with varying amplitude and varying frequency according to the VF profile. If the voltage applied to the main winding lags the start winding by 90 degrees, the motor runs in one (i.e., forward) direction. To reverse the direction of rotation, the voltage supplied to the main winding should lead the voltage supplied to the start winding.
Figure 3 and Figure 4 show the main and start winding voltages in forward and reverse respectively.
With this drive topology, control becomes more efficient; however, the control algorithm becomes more complex. The voltages V a, V b and V c should be controlled to achieve the phase difference between the effective voltages across the main and start windings to have a 90 degree phase shift to each other. The turn ratio of the start winding to the main winding is defined by:
where a is the turn ratio, and VMAIN and VSTART are the effective voltage across the main winding and the start winding.
In order to have equal voltage stress on all devices, thus improving the device utilization and provide the maximum possible output voltage for a given DC bus voltage, all three inverter phase voltages are kept at the same amplitude as follows: The effective voltage across the main and start winding is given as:
Because the turn ratio remains constant for a given motor, a can be a compile time option. With this, q and V1 can be precomputed for a given motor. This simplifies the run time calculation. Based on the phase angle, phase voltages Va, Vb and Vc can be calculated as:
Generating Software PWMs
The scheme shown here gives a fixed PWM frequency of approximately 7.9 kHz. Timer1 (1:4 prescale) is counted up from 00 to 634. At the beginning of the cycle (when Timer1 = 00), the PWMs controlling the upper switches (i.e., PWM1, PWM3 and PWM5) are turned ON. Based on the individual PWM duty cycle, the corresponding PWM output is turned OFF.